Trigger

We will see that if we want to contemplate higher background and physics rates, we must decrease the product of the rate times latency of the lowest level trigger as well as the digitization/readout time of the front-ends. We discuss the trigger solution first.

Backgrounds A good understanding of the expected low-level trigger rate for and greater is desirable when designing the architecture for the trigger and front-end electronics. Unfortunately, this is a difficult number to predict. To set the scale for the trigger rate, the cross sections of interesting processes at the are given in Table . This does not include two photon induced processes. At the the resonance contribution to the hadronic rate is five times larger than at the . At , 1 nb of cross section gives 1 Hz of trigger. In round terms, the physics trigger rate will be 100 Hz at . Assuming that any new trigger system will provide the same rejection and efficiency as the present one, we would expect a hardware trigger rate of about 200 Hz to 2 kHz without any pre-scaling of QED events.

While the interesting physics event-rate can be scaled from present CLEO experience, any fast (level 0) hardware trigger rate is largely driven by the IR background conditions. There are several ways to estimate this background rate for the configuration, although none is ideal. The first of these is to accept the rough estimates of the CESR machine designers, namely that changes to the IR and machine lattice will no more than double the background rates seen by CLEO II for each of the next two machine modifications (the completion of phase 2 and the introduction of phase 3). This means that at , the level 0 trigger rate should be 40 kHz or less.

One can also use an extrapolation of the CLEO II experience operating over a factor of ten in luminosity. Figure shows the level 0, 1, and 2 output rates over a factor of 3 in luminosity. All rates show a nearly linear dependence. Extrapolating to a factor of 3.3 increase in luminosity to gives a level 0 rate of 50 kHz.

Finally, lost beam particles and synchrotron radiation can be carefully simulated. The advantage of this technique is that the algorithm used can be tested by simulating the present machine/detector configuration and comparing with CLEO II observables, such as level 0 trigger rates and wire chamber currents. Comparisons of this sort have shown good agreement between measured and simulated quantities, giving us some confidence that the simulation will be correct for the and future CESR configurations as well. This method predicts that the level 0 trigger rate will remain below 25 kHz at .

Since a definitive prediction of the level 0 trigger rate is not possible, the conservative approach we adopt is to take the largest of the above estimates (50 kHz). Furthermore, to allow for the initial period of machine commissioning when the backgrounds will inevitably be large, any new trigger/front-end designs should accommodate a level 0 rate of 100 kHz.

Summarizing, at a luminosity of we should expect a level 0 (i.e., prompt) trigger rate of up to 100 kHz, and a final hardware trigger event rate of about 200 Hz.

Level 1 A trigger architecture similar to that in CLEO II will lead to large dead-time introduced by the level 1 latency if it is driven at the level 0 rates described above. We propose to do without a trigger level that attempts to track the beam crossings. While technologically challenging, it is not impossible to build a trigger that operates at 72 MHz, but there is no need for this since drift chamber signals used in the trigger are not available for up to 500 ns after a beam crossing and since the interesting event rate is less than 1 kHz compared to the many megahertz of beam crossings. Event overlap is negligible but events can have about 1%occupancy due to background.

Level 1 will be the lowest level trigger combining the features of both the present level 0 and level 1 while maintaining the overall rejection. The total processing time for this level can be as long as 2.5 s, an upper limit set by the need to start gating the CsI ADC's. The rate at which the level 1 trigger decisions can be generated is naturally set by the longest drift times used in the tracker trigger processor. This will be between 200 and 1200 ns depending on the drift chamber gas and cell design choice.

Modest levels of pipelining will be required to implement this trigger. The pipeline also makes it possible to time-align the data from the CsI and trackers which generate trigger information on very different time scales relative to the event beam crossing. Since some detector components will have an uncertainty in the arrival time of their trigger information that is larger than the pipeline bucket width, their information must be stretched across several buckets if the logic interrogating the trigger pipelines is to obtain information from a unique set of pipeline positions. Equivalently, the trigger information could be stored only once and the interrogating hardware be made smart enough to examine several buckets in a single pipeline.

Note that we are not designing a dead-timeless system. Level 1 is dead-timeless until a successful trigger occurs. A small dead-time, 10-100 s, is then incurred for data conversion and the level 2 decision time. This greatly simplifies the design. Furthermore, dead-time after a successful level 1 may be required for silicon readout systems that cannot perform simultaneous read and write.

The CLEO II trigger has been generally successful in providing the physics of interest to the collaboration. For we can maintain the general trigger categories used today, including low multiplicity final states of and physics. Improvement is possible in tracking by using finer granularity hit information and in energy triggering by providing physics-oriented quantities such as total energy and energy flow.

Tracking triggers will continue to rely on linking track segments found in adjacent clusters of axial layers. The loosest pure track trigger would comprise one track spanning the entire tracking radius. If this is too loose, an additional track that exits the main drift chamber at its half radius can be demanded. One possible improvement to the present track segment approach where four or more wires are OR-ed to form a hit bit is to use each axial wire in the segment finding. This is a simple brute force extension of the present track segment processor design. It will provide tighter x-y vertexing by reducing the segmentation at small radii. Also, segments can be momenta binned and this additional information used in the linking of segments.

The CLEO II energy trigger is essentially topological in nature, examining with very coarse granularity whether regions of the calorimeter are above either or both of two thresholds (100 MeV and 500 MeV). The primitives used are two level-discriminator bits available for each crystal array. The present trigger OR's these into 16 regions in the barrel and 16 regions in the endcap. This is adequate for triggering on a few large showers or on constrained geometry of lower energy showers. An upgraded trigger could use these bits at their full granularity. In addition, there is another set of unused discriminator bits where the leading edge is determined by a level-threshold and the trailing edge is determined by the zero-crossing of a fast shaped analog sum of the crystals. These may be important to ``bunch-stamp'' neutral energy triggers or to correlate with track triggers.

While the digital approach should be maintained, it should be augmented with an analog energy trigger. There are unused analog current sums from each crystal array which could easily be made available at the front-end crate level. This trigger can be done in analog form with current sums or digitally with sums from FADC's. In an analog implementation, one would conditionally combine the currents by digital thresholding to reduce noise contributions from quiet crystal arrays, and then threshold the combined analog sum. By appropriate weighting of the currents, total, transverse, and longitudinal energies can be formed. A level 1 trigger of this type could serve as the seed for a more sophisticated global energy trigger at level 2. These changes are attractive but their efficacy should be studied by Monte Carlo first.

It is conceivable that the particle ID system would be fast enough to contribute to the first level trigger. The major benefit could be to identify the event's beam crossing number which would give a start time for the drift chamber and CsI gate.

A desirable feature of the level 1 trigger is that it be in continual operation even when the DAQ system is incapable of handling more events. The delivery of the level 1 triggers to the crates and level 2 can be vetoed by the buffer overflow signals from the front-end boards and crates and from the event builder. In this way, the level 1 trigger can be used to measure actual experimental dead-time since we will not be measuring the gated or ungated luminosity of each beam individual beam bunch crossing.

As for any trigger, the input data and hardware algorithms must be easily modeled by the detector simulation codes.

Level 2 It should be noted that a level 2 trigger may not be required at all if level 1 can reduce the event rate to less than 1 kHz. In this scenario, the on-line software trigger-level 3-will be required to play a bigger role on the overall rejection factor of the system. Any decision to proceed along this route would have to take into account the increased bandwidth requirements within a front-end crate and from the crate to the level 3 node(s). Advantages would include a simpler hardware system with great flexibility that is easier to understand and simulate.

If it is needed, the level 2 trigger is initiated by a level 1 trigger. Since front-end data conversion and storage are also initiated by level 1, level 2 can take as long as the slowest converting detector device without increasing the dead-time. If the front-end systems support being interrupted during conversion, a failed level 2 trigger can abort the conversion and re-enable data taking. The present level 2 track processors require 50 s and a new design should be able to cycle in 10 s.

The level 2 tracking trigger would make use of the same wire hit information used at level 1. It would perform a wire-by-wire track linking algorithm and report a histogram of found momenta. The track finding would be in only since track information is encoded in the stereo layer drift times and in the silicon. The former is hard to use in hardware and the latter may not be available to the trigger. After digitizing the 500 crystal energy currents, the data can be processed to provide refined total and projective energies. It is also possible to provide a list of cluster energies and photon pair masses.

Figure shows a block diagram of the trigger.